Menu
Home / ECE / Digital Electronics :: Section 17

ECE :: Digital Electronics

Digital Electronics - Section 1
Digital Electronics - Section 2
Digital Electronics - Section 3
Digital Electronics - Section 4
Digital Electronics - Section 5
Digital Electronics - Section 6
Digital Electronics - Section 7
Digital Electronics - Section 8
Digital Electronics - Section 9
Digital Electronics - Section 10
Digital Electronics - Section 11
Digital Electronics - Section 12
Digital Electronics - Section 13
Digital Electronics - Section 14
Digital Electronics - Section 15
Digital Electronics - Section 16
Digital Electronics - Section 17
Digital Electronics - Section 18
Digital Electronics - Section 19
Digital Electronics - Section 20
Digital Electronics - Section 21
Digital Electronics - Section 22
Digital Electronics - Section 23
Digital Electronics - Section 24
Digital Electronics - section-25
Digital Electronics - Section-26

  1. A two-input OR gate is designed for positive logic. However, it is operated with negative logic. The resulting logic operation will then be

    2. A.
    OR
    B.
    AND
    C.
    NOR
    D.
    EX-OR

    View Answer

    Workspace

    Discuss Discuss in Forum

  2. A clock signal driving a 6-bit ring counter has a frequency of 1 MHz. How long is each timing bit high?

    3. A.
    1 ms
    B.
    2 ms
    C.
    3 ms
    D.
    6 ms

    View Answer

    Workspace

    Discuss Discuss in Forum

  3. A twisted ring counter consisting of 4 FF will have

    4. A.
    4 states
    B.
    8 states
    C.
    24 states
    D.
    None of the above

    View Answer

    Workspace

    Discuss Discuss in Forum

  4. Assertion (A): In a serial in-serial out shift register, access is available only to the left most or right most flip flops

    Reason (R): If the output of a shift register is feedback to serial input it can be used as a ring counter.

    5. A.
    Both A and R are correct and R is correct explanation of A
    B.
    Both A and R are correct but R is not correct explanation of A
    C.
    A is true, R is false
    D.
    A is false, R is true

    View Answer

    Workspace

    Discuss Discuss in Forum

  5. IC counters are

    6. A.
    synchronous only
    B.
    asynchronous only
    C.
    both synchronous and asynchronous
    D.
    none of the above

    View Answer

    Workspace

    Discuss Discuss in Forum

  6. The method used to transfer data from I/O units to memory by suspending the memory-CPU data transfer for one memory cycle is called

    7. A.
    I/O spooling
    B.
    Cycle stealing
    C.
    Line conditioning
    D.
    Demand paging

    View Answer

    Workspace

    Discuss Discuss in Forum

  7. Out of SAM and RAM

    8. A.
    access time in both does not depend on address location
    B.
    in SAM access time depends on address location but not in RAM
    C.
    in RAM access time depends on address location but not in SAM
    D.
    in both the access time depends on storage location

    View Answer

    Workspace

    Discuss Discuss in Forum

  8. Bipolar IC memories are fabricated using

    9. A.
    high density versions of MOSFET or low density versions of bipolar transistor flip-flop.
    B.
    high density version of MOSFET or bipolar transistor flip-flop
    C.
    low density versions of MOSFETs
    D.
    high density versions of the bipolar transistor flip-flop.

    View Answer

    Workspace

    Discuss Discuss in Forum

  9. For K map of the given figure the simplified Boolean expression is

    10. A.
    Y = A B C + A B C + A B C
    B.
    Y = A C + B
    C.
    Y = A B C + ABC
    D.
    Y = A B C + AB C + ABC

    View Answer

    Workspace

    Discuss Discuss in Forum

  10. Choose the appropriate turn on and turn off time of a FET

    11. A.
    1 ns, 10ns
    B.
    6 ns, 18ns
    C.
    4 ns, 8 ns
    D.
    10 ns, 10 ns

    View Answer

    Workspace

    Discuss Discuss in Forum

Java Programming Questions and Answers Interview Questions and Answers