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ECE :: Digital Electronics

  1. The inputs to logic gate are 0. The output is 1. The gate is

  2. A.
    NAND or XOR
    B.
    OR or XOR
    C.
    AND or XOR
    D.
    NOR or Ex-NOR

  3. In a JK master slave flip flop race condition does not occur.

  4. A.
    True
    B.
    False

  5. State transition table and state transition diagram form part of design steps for

  6. A.
    combinational circuits
    B.
    sequential circuits
    C.
    delay circuits
    D.
    all of the above

  7. Which binary subtraction is incorrect?

  8. A.
    100101 - 100011 = 000000
    B.
    10000000 - 01000000 = 1000000
    C.
    10111110.1 - 101011.11 = 110010.11
    D.
    11111111 - 1111111 = 10000000

  9. Consider the following statements:

    1. Race around condition can occur in JK flip flop when both inputs are 1
    2. A flip flop is used to store one bit of information
    3. A transparent latch is a D type flip flop
    4. Master slave flip flop is used to store two bits of information
    Which of the above are correct?

  10. A.
    1, 2, 3
    B.
    1, 3, 4
    C.
    1, 2, 4
    D.
    2, 3, 4

  11. D FF can be used as a

  12. A.
    differentiator
    B.
    divider circuit
    C.
    delay switch
    D.
    none

  13. In flip flops the duration of clock pulse is about

  14. A.
    3 ns
    B.
    10 ns
    C.
    25 ns
    D.
    50 ns

  15. Which of the following is decimal equivalent of the binary 1111111?

  16. A.
    27
    B.
    87
    C.
    127
    D.
    167

  17. A 555 timer can be used as

  18. A.
    an astable multivibrator
    B.
    monostable multivibrator
    C.
    frequency Divider only
    D.
    any of the above

  19. Which of the following statements defines a full adder?

  20. A.
    It adds two binary digits and produces their SUM and CARRY
    B.
    It adds three inputs (two binary digits and a carry) and produces their SUM and CARRY
    C.
    It has two inputs and two outputs
    D.
    None of the above