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ECE :: Digital Electronics

  1. Assertion (A): Master slave JK flip flop is commonly used in high speed synchronous circuitry

    Reason (R): Master slave JK flip flop uses two JK flip flops in cascade.

  2. A.
    Both A and R are correct and R is correct explanation of A
    B.
    Both A and R are correct but R is not correct explanation of A
    C.
    A is true, R is false
    D.
    A is false, R is true

  3. Inputs A and B of the given figure are applied to a NAND gate. The output is LOW

  4. A.
    from 0 to 6
    B.
    from 0 to 2
    C.
    from 0 to 1 and 2 to 3
    D.
    from 1 to 2 and 3 to 4

  5. ECL is a saturating logic.

  6. A.
    True
    B.
    False

  7. For the NMOS gate in the given figure, F =

  8. A.
    ABCDE
    B.
    (AB + C) (D + E)
    C.
    A(B + C) + DE
    D.
    A + B C + DE

  9. The resolution of 4 bit counting ADC is 0.5 volt, for an Analog input of 6.6 volts. The digital output of ADC will be

  10. A.
    1011
    B.
    1101
    C.
    1100
    D.
    1110

  11. 9's complement of 1210 is

  12. A.
    2110
    B.
    8710
    C.
    7810
    D.
    7610

  13. The minterm designation for ABCD is

  14. A.
    m8
    B.
    m10
    C.
    m14
    D.
    m15

  15. Read the following statements

    1. The circuitry of ripple counter is more complex than that of synchronous counter.
    2. The maximum frequency of operation of ripple counter depends on the modulus of the counter.
    3. The maximum frequency of operation of synchronous counter does not depend on the modulus of the counter.
    Which of the above statements are correct?

  16. A.
    1 only
    B.
    1, 2
    C.
    1, 2, 3
    D.
    2, 3

  17. The minterm designation for ABCD is

  18. A.
    m11
    B.
    m13
    C.
    m15
    D.
    m16

  19. The logic circuit of the given figure is equivalent to