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ECE :: Digital Electronics

Digital Electronics - Section 1
Digital Electronics - Section 2
Digital Electronics - Section 3
Digital Electronics - Section 4
Digital Electronics - Section 5
Digital Electronics - Section 6
Digital Electronics - Section 7
Digital Electronics - Section 8
Digital Electronics - Section 9
Digital Electronics - Section 10
Digital Electronics - Section 11
Digital Electronics - Section 12
Digital Electronics - Section 13
Digital Electronics - Section 14
Digital Electronics - Section 15
Digital Electronics - Section 16
Digital Electronics - Section 17
Digital Electronics - Section 18
Digital Electronics - Section 19
Digital Electronics - Section 20
Digital Electronics - Section 21
Digital Electronics - Section 22
Digital Electronics - Section 23
Digital Electronics - Section 24
Digital Electronics - section-25
Digital Electronics - Section-26

  1. Minimum number of 2-input NAND gates required to implement the function F = (x + y) (Z + W) is

    2. A.
    3
    B.
    4
    C.
    5
    D.
    6

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  2. Which device has one input and many outputs?

    3. A.
    Multiplexer
    B.
    Demultiplexer
    C.
    Counter
    D.
    Flip flop

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  3. A carry look ahead adder is frequently used for addition because

    4. A.
    it costs less
    B.
    it is faster
    C.
    it is more accurate
    D.
    is uses fewer gates

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  4. The counter in the given figure is

    5. A.
    Mod 3
    B.
    Mod 6
    C.
    Mod 8
    D.
    Mod 7

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  5. In register index addressing mode the effective address is given by

    6. A.
    index register value
    B.
    sum of the index register value and the operand
    C.
    operand
    D.
    difference of the index register value and the operand

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  6. 7BF16 = __________ 2

    7. A.
    0111 1011 1110
    B.
    0111 1011 1111
    C.
    0111 1011 0111
    D.
    0111 1011 0011

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  7. For the minterm designation Y = ∑ m (1, 3, 5, 7) the complete expression is

    8. A.
    Y = A BC + A B C
    B.
    Y = A B C + A B C + ABC + A BC
    C.
    Y = A B C + A B C + ABC + A BC
    D.
    Y = A B C + ABC + A BC + A BC

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  8. Zero suppression is not used in actual practice.

    9. A.
    True
    B.
    False

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  9. A counter type A/D converter contains a 4 bit binary ladder and a counter driven by a 2 MHz clock. Then conversion time

    10. A.
    8 μ sec
    B.
    10 μ sec
    C.
    2 μ sec
    D.
    5 μ sec

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  10. The hexadecimal number (3E8)16 is equal to decimal number

    11. A.
    1000
    B.
    982
    C.
    768
    D.
    323

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