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  1. A computer has a 256 KByte, 4-way set associative, write back data cache with block size of 32 Bytes. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bits, 1 modified bit and 1 replacement bit.
    The number of bits in the tag field of an address is
    2. A.
    11
    B.
    14
    C.
    16
    D.
    27

    View Answer

    Workspace

    View Answer

    Answer : Option C

    Explanation :

    -NA-

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