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  1. A 4 bit shift register is initialized to value 1000 for (Q3, Q2, Q1, Q0). The D input is derived from Q0, Q2 and Q3 through two XOR gates as shown in figure. The pattern 1000 will appear at

    2. A.
    3rd pulse
    B.
    7th pulse
    C.
    6th pulse
    D.
    4th pulse

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    Answer : Option C

    Explanation :

    No answer description available for this question.

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