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Discussion :: Analog Electronics

  1. The voltage between the emitter and collector of a silicon transistor when the transistor is biased to be at the edge of saturation is
    2. A.
    5 volts
    B.
    10 Volts
    C.
    0.1 Volts
    D.
    0.3 Volts

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    Answer : Option D

    Explanation :

    VEOS = 0.3V

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